Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

## SETF8, SETF16

Set the PSTATE.NZV flags based on the value in the specified general-purpose register. SETF8 treats the value as an 8 bit value, and SETF16 treats the value as an 16 bit value.

The PSTATE.C flag is not affected by these instructions.

### Integer
(FEAT_FlagM)

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | sz | 0 | 0 | 1 | 0 | Rn | 0 | 1 | 1 | 0 | 1
sf |  |  |  |  |  |  |  |  |

#### SETF8 (sz == 0)

SETF8 <Wn>

#### SETF16 (sz == 1)

SETF16 <Wn>

if !IsFeatureImplemented(FEAT_FlagM) then UNDEFINED; constant integer msb = (8 << UInt(sz)) - 1; integer n = UInt(Rn);

### Assembler Symbols

<Wn> | Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

### Operation

bits(32) tmpreg = X[n, 32]; PSTATE.N = tmpreg<msb>; PSTATE.Z = if (tmpreg<msb:0> == Zeros(msb + 1)) then '1' else '0'; PSTATE.V = tmpreg<msb+1> EOR tmpreg<msb>; //PSTATE.C unchanged;

### Operational information

If PSTATE.DIT is 1:

- The execution time of this instruction is independent of:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.
- The response of this instruction to asynchronous exceptions does not vary based on:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: isa v33.74, AdvSIMD v29.23, pseudocode v2023-09_rel, sve v2023-09_rc3 ; Build timestamp: 2023-09-27T17:06

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