AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

# AMDEVARCH, Activity Monitors Device Architecture Register

The AMDEVARCH characteristics are:

## Purpose

Identifies the programmers' model architecture of the AMU component.

## Configuration

It is IMPLEMENTATION DEFINED whether AMDEVARCH is implemented in the Core power domain or in the Debug power domain.

This register is present only when FEAT_AMUv1 is implemented and an implementation implements AMDEVARCH. Otherwise, direct accesses to AMDEVARCH are RES0.

## Attributes

AMDEVARCH is a 32-bit register.

This register is part of the AMU block.

## Field descriptions

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
ARCHITECT | PRESENT | REVISION | ARCHID

#### ARCHITECT, bits [31:21]

Defines the architect of the component. For Activity Monitors, this is Arm Limited.

Bits [31:28] are the JEP106 continuation code, 0b0100.

Bits [27:21] are the JEP106 identification code, 0b0111011.

Reads as 0b01000111011.

Access to this field is RO.

#### PRESENT, bit [20]

DEVARCH present. Indicates that the AMDEVARCH register is present.

Reads as 0b1.

Access to this field is RO.

#### REVISION, bits [19:16]

Defines the architecture revision. For architectures defined by Arm this is the minor revision.

REVISION | Meaning
--- | ---
0b0000 | Architecture revision is AMUv1.

All other values are reserved.

Access to this field is RO.

#### ARCHID, bits [15:0]

Defines this part to be an AMU component. For architectures defined by Arm this is further subdivided.

For AMU:

- Bits [15:12] are the architecture version, also identified as AMDEVARCH.ARCHVER.
- Bits [11:0] are the architecture part number, also identified as AMDEVARCH.ARCHPART.

AMDEVARCH.ARCHVER = 0x0, which corresponds to AMU architecture version AMUv1.

If FEAT_AMU_EXT32 is implemented, AMDEVARCH is 0xA66.

If FEAT_AMU_EXT64 is implemented, AMDEVARCH is 0xA67.

The value of this field is an IMPLEMENTATION DEFINED choice of:

ARCHID | Meaning
--- | ---
0x0A66 | AMUv1, with FEAT_AMU_EXT32 implemented.
0x0A67 | AMUv1, with FEAT_AMU_EXT64 implemented.

Access to this field is RO.

## Accessing AMDEVARCH

Accesses to this register use the following encodings:

#### When FEAT_AMU_EXT64 is implemented

Accessible at offset 0xFBC from AMU

Accesses on this interface are RO.

#### When FEAT_AMU_EXT32 is implemented

Accessible at offset 0xFBC from AMU

Accesses on this interface are RO.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

Copyright © 2010-2024 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.