Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

## ADDSPL

Add multiple of Streaming SVE predicate register size to scalar register

Add the Streaming SVE predicate register size in bytes multiplied by an immediate in the range -32 to 31 to the 64-bit source general-purpose register or current stack pointer and place the result in the 64-bit destination general-purpose register or current stack pointer.

This instruction does not require the PE to be in Streaming SVE mode.

### SME
(FEAT_SME)

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | Rn | 0 | 1 | 0 | 1 | 1 | imm6 | Rd

####

ADDSPL <Xd|SP>, <Xn|SP>, #<imm>

if !HaveSME() then UNDEFINED; integer n = UInt(Rn); integer d = UInt(Rd); integer imm = SInt(imm6);

### Assembler Symbols

<Xd|SP> | Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP> | Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<imm> | Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

### Operation

CheckSMEEnabled(); constant integer SVL = CurrentSVL; integer len = imm * (SVL DIV 64); bits(64) operand1 = if n == 31 then SP[] else X[n, 64]; bits(64) result = operand1 + len; if d == 31 then SP[] = result; else X[d, 64] = result;

### Operational information

If PSTATE.DIT is 1:

- The execution time of this instruction is independent of:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.
- The response of this instruction to asynchronous exceptions does not vary based on:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: isa v33.74, AdvSIMD v29.23, pseudocode v2023-09_rel, sve v2023-09_rc3 ; Build timestamp: 2023-09-27T17:06

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