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## CPYFPWN, CPYFMWN, CPYFEWN

Memory Copy Forward-only, writes non-temporal. These instructions perform a memory copy. The prologue, main, and epilogue instructions are expected to be run in succession and to appear consecutively in memory: CPYFPWN, then CPYFMWN, and then CPYFEWN.

CPYFPWN performs some preconditioning of the arguments suitable for using the CPYFMWN instruction, and performs an implementation defined amount of the memory copy. CPYFMWN performs an implementation defined amount of the memory copy. CPYFEWN performs the last part of the memory copy.

#### Note

The inclusion of implementation defined amounts of memory copy allows some optimization of the size that can be performed.

The memory copy performed by these instructions is in the forward direction only, so the instructions are suitable for a memory copy only where there is no overlap between the source and destination locations, or where the source address is greater than the destination address.

The architecture supports two algorithms for the memory copy: option A and option B. Which algorithm is used is implementation defined.

#### Note

Portable software should not assume that the choice of algorithm is constant.

After execution of CPYFPWN, option A (which results in encoding PSTATE.C = 0):

- If Xn<63> == 1, the copy size is saturated to 0x7FFFFFFFFFFFFFFF.
- Xs holds the original Xs + saturated Xn.
- Xd holds the original Xd + saturated Xn.
- Xn holds -1* saturated Xn + an implementation defined number of bytes copied.
- PSTATE.{N,Z,V} are set to {0,0,0}.

After execution of CPYFPWN, option B (which results in encoding PSTATE.C = 1):

- If Xn<63> == 1, the copy size is saturated to 0x7FFFFFFFFFFFFFFF.
- Xs holds the original Xs + an implementation defined number of bytes copied.
- Xd holds the original Xd + an implementation defined number of bytes copied.
- Xn holds the saturated Xn - an implementation defined number of bytes copied.
- PSTATE.{N,Z,V} are set to {0,0,0}.

For CPYFMWN, option A (encoded by PSTATE.C = 0), the format of the arguments is:

- Xn is treated as a signed 64-bit number and holds -1* the number of bytes remaining to be copied in the memory copy in total.
- Xs holds the lowest address that the copy is copied from -Xn.
- Xd holds the lowest address that the copy is made to -Xn.
- At the end of the instruction, the value of Xn is written back with -1* the number of bytes remaining to be copied in the memory copy in total.

For CPYFMWN, option B (encoded by PSTATE.C = 1), the format of the arguments is:

- Xn holds the number of bytes remaining to be copied in the memory copy in total.
- Xs holds the lowest address that the copy is copied from.
- Xd holds the lowest address that the copy is copied to.
- At the end of the instruction:
  - the value of Xn is written back with the number of bytes remaining to be copied in the memory copy in total.
  - the value of Xs is written back with the lowest address that has not been copied from.
  - the value of Xd is written back with the lowest address that has not been copied to.

For CPYFEWN, option A (encoded by PSTATE.C = 0), the format of the arguments is:

- Xn is treated as a signed 64-bit number and holds -1* the number of bytes remaining to be copied in the memory copy in total.
- Xs holds the lowest address that the copy is copied from -Xn.
- Xd holds the lowest address that the copy is made to -Xn.
- At the end of the instruction, the value of Xn is written back with 0.

For CPYFEWN, option B (encoded by PSTATE.C = 1), the format of the arguments is:

- Xn holds the number of bytes remaining to be copied in the memory copy in total.
- Xs holds the lowest address that the copy is copied from.
- Xd holds the lowest address that the copy is copied to.
- At the end of the instruction:
  - the value of Xn is written back with 0.
  - the value of Xs is written back with the lowest address that has not been copied from.
  - the value of Xd is written back with the lowest address that has not been copied to.

### Integer
(FEAT_MOPS)

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
sz | 0 | 1 | 1 | 0 | 0 | 1 | op1 | 0 | Rs | 0 | 1 | 0 | 0 | 0 | 1 | Rn | Rd
|  |  |  |  |  |  | op2 |  |  |

#### Epilogue (op1 == 10)

CPYFEWN [<Xd>]!, [<Xs>]!, <Xn>!

#### Main (op1 == 01)

CPYFMWN [<Xd>]!, [<Xs>]!, <Xn>!

#### Prologue (op1 == 00)

CPYFPWN [<Xd>]!, [<Xs>]!, <Xn>!

if !HaveFeatMOPS() then UNDEFINED; if sz != '00' then UNDEFINED; integer d = UInt(Rd); integer s = UInt(Rs); integer n = UInt(Rn); bits(4) options = op2; MOPSStage stage; case op1 of when '00' stage = MOPSStage_Prologue; when '01' stage = MOPSStage_Main; when '10' stage = MOPSStage_Epilogue; otherwise SEE "Memory Copy and Memory Set"; if d == s || s == n || d == n then UNDEFINED; if d == 31 || s == 31 || n == 31 then UNDEFINED;

### Assembler Symbols

<Xd> | For the epilogue and main variant: is the 64-bit name of the general-purpose register that holds an encoding of the destination address, encoded in the "Rd" field.
| For the prologue variant: is the 64-bit name of the general-purpose register that holds the destination address and is updated by the instruction, encoded in the "Rd" field.

<Xs> | For the epilogue and main variant: is the 64-bit name of the general-purpose register that holds an encoding of the source address, encoded in the "Rs" field.
| For the prologue variant: is the 64-bit name of the general-purpose register that holds the source address and is updated by the instruction, encoded in the "Rs" field.

<Xn> | For the epilogue variant: is the 64-bit name of the general-purpose register that holds an encoding of the number of bytes to be transferred and is set to zero at the end of the instruction, encoded in the "Rn" field.
| For the main variant: is the 64-bit name of the general-purpose register that holds an encoding of the number of bytes to be transferred, encoded in the "Rn" field.
| For the prologue variant: is the 64-bit name of the general-purpose register that holds the number of bytes to be transferred and is updated by the instruction to encode the remaining size and destination, encoded in the "Rn" field.

### Operation

CheckMOPSEnabled(); integer N = MaxBlockSizeCopiedBytes(); bits(64) toaddress = X[d, 64]; bits(64) fromaddress = X[s, 64]; bits(64) cpysize = X[n, 64]; bits(4) nzcv = PSTATE.<N,Z,C,V>; bits(64) stagecpysize; bits(8*N) readdata; integer B; boolean supports_option_a = CPYFOptionA(); boolean rprivileged; boolean wprivileged; case PSTATE.EL of when EL0 rprivileged = FALSE; wprivileged = FALSE; when EL1 if EL2Enabled() && HaveNVExt() && HCR_EL2.<NV,NV1> == '11' then rprivileged = TRUE; wprivileged = TRUE; else rprivileged = options<1> == '0'; wprivileged = options<0> == '0'; when EL2 if HaveVirtHostExt() && HCR_EL2.<E2H,TGE> == '11' then rprivileged = options<1> == '0'; wprivileged = options<0> == '0'; else rprivileged = TRUE; wprivileged = TRUE; when EL3 rprivileged = TRUE; wprivileged = TRUE; if HaveUAOExt() && PSTATE.UAO == '1' then rprivileged = PSTATE.EL != EL0; wprivileged = PSTATE.EL != EL0; boolean rnontemporal = options<3> == '1'; boolean wnontemporal = options<2> == '1'; AccessDescriptor raccdesc = CreateAccDescMOPS(MemOp_LOAD, rprivileged, rnontemporal); AccessDescriptor waccdesc = CreateAccDescMOPS(MemOp_STORE, wprivileged, wnontemporal); if stage == MOPSStage_Prologue then if cpysize<63> == '1' then cpysize = 0x7FFFFFFFFFFFFFFF<63:0>; if supports_option_a then nzcv = '0000'; // Copy in the forward direction offsets the arguments. toaddress = toaddress + cpysize; fromaddress = fromaddress + cpysize; cpysize = Zeros(64) - cpysize; else nzcv = '0010'; // IMP DEF selection of the amount covered by pre-processing. stagecpysize = CPYPreSizeChoice(toaddress, fromaddress, cpysize); assert stagecpysize<63> == cpysize<63> || stagecpysize == Zeros(64); if SInt(cpysize) > 0 then assert SInt(stagecpysize) <= SInt(cpysize); else assert SInt(stagecpysize) >= SInt(cpysize); else boolean zero_size_exceptions = MemCpyZeroSizeCheck(); // Check if this version is consistent with the state of the call. if zero_size_exceptions || SInt(cpysize) != 0 then if supports_option_a then if nzcv<1> == '1' then // PSTATE.C boolean wrong_option = TRUE; boolean from_epilogue = stage == MOPSStage_Epilogue; MismatchedMemCpyException(supports_option_a, d, s, n, wrong_option, from_epilogue, options); else if nzcv<1> == '0' then // PSTATE.C boolean wrong_option = TRUE; boolean from_epilogue = stage == MOPSStage_Epilogue; MismatchedMemCpyException(supports_option_a, d, s, n, wrong_option, from_epilogue, options); bits(64) postsize = CPYPostSizeChoice(toaddress, fromaddress, cpysize); assert postsize<63> == cpysize<63> || SInt(postsize) == 0; if stage == MOPSStage_Main then stagecpysize = cpysize - postsize; // Check if the parameters to this instruction are valid. if MemCpyParametersIllformedM(toaddress, fromaddress, cpysize) then boolean wrong_option = FALSE; boolean from_epilogue = FALSE; MismatchedMemCpyException(supports_option_a, d, s, n, wrong_option, from_epilogue, options); else stagecpysize = postsize; // Check if the parameters to this instruction are valid for the epilogue. if (cpysize != postsize || MemCpyParametersIllformedE(toaddress, fromaddress, cpysize)) then boolean wrong_option = FALSE; boolean from_epilogue = TRUE; MismatchedMemCpyException(supports_option_a, d, s, n, wrong_option, from_epilogue, options); if supports_option_a then while SInt(stagecpysize) != 0 do // IMP DEF selection of the block size that is worked on. While many // implementations might make this constant, that is not assumed. B = CPYSizeChoice(toaddress, fromaddress, cpysize); assert B <= -1 * SInt(stagecpysize); readdata<B*8-1:0> = Mem[fromaddress+cpysize, B, raccdesc]; Mem[toaddress+cpysize, B, waccdesc] = readdata<B*8-1:0>; cpysize = cpysize + B; stagecpysize = stagecpysize + B; if stage != MOPSStage_Prologue then X[n, 64] = cpysize; else while UInt(stagecpysize) > 0 do // IMP DEF selection of the block size that is worked on. While many // implementations might make this constant, that is not assumed. B = CPYSizeChoice(toaddress, fromaddress, cpysize); assert B <= UInt(stagecpysize); readdata<B*8-1:0> = Mem[fromaddress, B, raccdesc]; Mem[toaddress, B, waccdesc] = readdata<B*8-1:0>; fromaddress = fromaddress + B; toaddress = toaddress + B; cpysize = cpysize - B; stagecpysize = stagecpysize - B; if stage != MOPSStage_Prologue then X[n, 64] = cpysize; X[d, 64] = toaddress; X[s, 64] = fromaddress; if stage == MOPSStage_Prologue then X[n, 64] = cpysize; X[d, 64] = toaddress; X[s, 64] = fromaddress; PSTATE.<N,Z,C,V> = nzcv;

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: isa v33.53, AdvSIMD v29.11, pseudocode v2022-09_rel, sve v2022-09_rel ; Build timestamp: 2022-09-30T16:37

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