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# CNTHVS_TVAL, Counter-timer Secure Virtual Timer TimerValue Register (EL2)

The CNTHVS_TVAL characteristics are:

## Purpose

Provides AArch32 access to the timer value for the Secure EL2 virtual timer.

## Configuration

AArch32 System register CNTHVS_TVAL bits [31:0] are architecturally mapped to AArch64 System register CNTHVS_TVAL_EL2[31:0].

This register is present only when AArch32 is supported and FEAT_SEL2 is implemented. Otherwise, direct accesses to CNTHVS_TVAL are UNDEFINED.

## Attributes

CNTHVS_TVAL is a 32-bit register.

## Field descriptions

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
TimerValue

#### TimerValue, bits [31:0]

The TimerValue view of the EL2 virtual timer.

On a read of this register:

- If CNTHVS_CTL.ENABLE is 0, the value returned is UNKNOWN.
- If CNTHVS_CTL.ENABLE is 1, the value returned is (CNTHVS_CVAL - CNTVCT).

On a write of this register, CNTHVS_CVAL is set to (CNTVCT + TimerValue), where TimerValue is treated as a signed 32-bit integer.

When CNTHVS_CTL.ENABLE is 1, the timer condition is met when (CNTVCT - CNTHVS_CVAL) is greater than or equal to zero. This means that TimerValue acts like a 32-bit downcounter timer. When the timer condition is met:

- CNTHVS_CTL.ISTATUS is set to 1.
- If CNTHVS_CTL.IMASK is 0, an interrupt is generated.

When CNTHVS_CTL.ENABLE is 0, the TimerValue cannot be read but continues to decrement. When the timer is enabled, the TimerValue represents the elapsed time whether that time was spent enabled or disabled.

## Accessing CNTHVS_TVAL

This register is accessed using the encoding for CNTV_TVAL.

Accesses to this register use the following encodings in the System register encoding space:

#### MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}

coproc | opc1 | CRn | CRm | opc2
--- | --- | --- | --- | ---
0b1111 | 0b000 | 0b1110 | 0b0011 | 0b000

if PSTATE.EL == EL0 then if !ELUsingAArch32(EL1) && !ELIsInHost(EL0) && CNTKCTL_EL1.EL0VTEN == '0' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); else AArch64.AArch32SystemAccessTrap(EL1, 0x03); elsif ELUsingAArch32(EL1) && CNTKCTL.PL0VTEN == '0' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then AArch32.TakeHypTrapException(0x00); else UNDEFINED; elsif ELIsInHost(EL0) && CNTHCTL_EL2.EL0VTEN == '0' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && !ELIsInHost(EL0) && IsFeatureImplemented(FEAT_ECV) && CNTHCTL_EL2.EL1TVT == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif ELIsInHost(EL0) && IsCurrentSecurityState(SS_Secure) && IsFeatureImplemented(FEAT_SEL2) then if CNTHVS_CTL_EL2.ENABLE == '0' then R[t] = bits(32) UNKNOWN; else R[t] = (CNTHVS_CVAL_EL2 - PhysicalCountInt())<31:0>; elsif ELIsInHost(EL0) && !IsCurrentSecurityState(SS_Secure) then if CNTHV_CTL_EL2.ENABLE == '0' then R[t] = bits(32) UNKNOWN; else R[t] = (CNTHV_CVAL_EL2 - PhysicalCountInt())<31:0>; else if CNTV_CTL.ENABLE == '0' then R[t] = bits(32) UNKNOWN; elsif HaveEL(EL2) && !ELUsingAArch32(EL2) then R[t] = (CNTV_CVAL - (PhysicalCountInt() - CNTVOFF_EL2))<31:0>; elsif HaveEL(EL2) && ELUsingAArch32(EL2) then R[t] = (CNTV_CVAL - (PhysicalCountInt() - CNTVOFF))<31:0>; else R[t] = (CNTV_CVAL - PhysicalCountInt())<31:0>; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && IsFeatureImplemented(FEAT_ECV) && CNTHCTL_EL2.EL1TVT == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); else if CNTV_CTL.ENABLE == '0' then R[t] = bits(32) UNKNOWN; elsif HaveEL(EL2) && !ELUsingAArch32(EL2) then R[t] = (CNTV_CVAL - (PhysicalCountInt() - CNTVOFF_EL2))<31:0>; elsif HaveEL(EL2) && ELUsingAArch32(EL2) then R[t] = (CNTV_CVAL - (PhysicalCountInt() - CNTVOFF))<31:0>; else R[t] = (CNTV_CVAL - PhysicalCountInt())<31:0>; elsif PSTATE.EL == EL2 then if CNTV_CTL.ENABLE == '0' then R[t] = bits(32) UNKNOWN; else R[t] = (CNTV_CVAL - (PhysicalCountInt() - CNTVOFF))<31:0>; elsif PSTATE.EL == EL3 then if CNTV_CTL.ENABLE == '0' then R[t] = bits(32) UNKNOWN; elsif HaveEL(EL2) then R[t] = (CNTV_CVAL - (PhysicalCountInt() - CNTVOFF))<31:0>; else R[t] = (CNTV_CVAL - PhysicalCountInt())<31:0>;

#### MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}

coproc | opc1 | CRn | CRm | opc2
--- | --- | --- | --- | ---
0b1111 | 0b000 | 0b1110 | 0b0011 | 0b000

if PSTATE.EL == EL0 then if !ELUsingAArch32(EL1) && !ELIsInHost(EL0) && CNTKCTL_EL1.EL0VTEN == '0' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); else AArch64.AArch32SystemAccessTrap(EL1, 0x03); elsif ELUsingAArch32(EL1) && CNTKCTL.PL0VTEN == '0' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then AArch32.TakeHypTrapException(0x00); else UNDEFINED; elsif ELIsInHost(EL0) && CNTHCTL_EL2.EL0VTEN == '0' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && !ELIsInHost(EL0) && IsFeatureImplemented(FEAT_ECV) && CNTHCTL_EL2.EL1TVT == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif ELIsInHost(EL0) && IsCurrentSecurityState(SS_Secure) && IsFeatureImplemented(FEAT_SEL2) then CNTHVS_CVAL_EL2 = SignExtend(R[t], 64) + PhysicalCountInt(); elsif ELIsInHost(EL0) && !IsCurrentSecurityState(SS_Secure) then CNTHV_CVAL_EL2 = SignExtend(R[t], 64) + PhysicalCountInt(); else if HaveEL(EL2) && !ELUsingAArch32(EL2) then CNTV_CVAL = (SignExtend(R[t], 64) + PhysicalCountInt()) - CNTVOFF_EL2; elsif HaveEL(EL2) && ELUsingAArch32(EL2) then CNTV_CVAL = (SignExtend(R[t], 64) + PhysicalCountInt()) - CNTVOFF; else CNTV_CVAL = SignExtend(R[t], 64) + PhysicalCountInt(); elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && IsFeatureImplemented(FEAT_ECV) && CNTHCTL_EL2.EL1TVT == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); else if HaveEL(EL2) && !ELUsingAArch32(EL2) then CNTV_CVAL = (SignExtend(R[t], 64) + PhysicalCountInt()) - CNTVOFF_EL2; elsif HaveEL(EL2) && ELUsingAArch32(EL2) then CNTV_CVAL = (SignExtend(R[t], 64) + PhysicalCountInt()) - CNTVOFF; else CNTV_CVAL = SignExtend(R[t], 64) + PhysicalCountInt(); elsif PSTATE.EL == EL2 then CNTV_CVAL = (SignExtend(R[t], 64) + PhysicalCountInt()) - CNTVOFF; elsif PSTATE.EL == EL3 then if HaveEL(EL2) then CNTV_CVAL = (SignExtend(R[t], 64) + PhysicalCountInt()) - CNTVOFF; else CNTV_CVAL = SignExtend(R[t], 64) + PhysicalCountInt();

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

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