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## CSINC

Conditional Select Increment returns, in the destination register, the value of the first source register if the condition is TRUE, and otherwise returns the value of the second source register incremented by 1.

This instruction is used by the aliases CINC, and CSET.

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
sf | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | Rm | cond | 0 | 1 | Rn | Rd
| op | S |  |  |  |  | o2 |  |

#### 32-bit (sf == 0)

CSINC <Wd>, <Wn>, <Wm>, <cond>

#### 64-bit (sf == 1)

CSINC <Xd>, <Xn>, <Xm>, <cond>

integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); constant integer datasize = 32 << UInt(sf); bits(4) condition = cond;

### Assembler Symbols

<Wd> | Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn> | Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Wm> | Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.

<cond> | Is one of the standard conditions, encoded in the standard way, and encoded in cond:
cond | <cond>
--- | ---
0000 | EQ
0001 | NE
0010 | CS
0011 | CC
0100 | MI
0101 | PL
0110 | VS
0111 | VC
1000 | HI
1001 | LS
1010 | GE
1011 | LT
1100 | GT
1101 | LE
1110 | AL
1111 | NV

<Xd> | Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn> | Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Xm> | Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.

### Alias Conditions

Alias | Is preferred when
--- | ---
CINC | Rm != '11111' && Rn != '11111' && !(cond IN {'111x'}) && Rn == Rm
CSET | Rm == '11111' && Rn == '11111' && !(cond IN {'111x'})

### Operation

bits(datasize) result; if ConditionHolds(condition) then result = X[n, datasize]; else result = X[m, datasize] + 1; X[d, datasize] = result;

### Operational information

If PSTATE.DIT is 1:

- The execution time of this instruction is independent of:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.
- The response of this instruction to asynchronous exceptions does not vary based on:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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