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# TRCITCTRL, Trace Integration Mode Control Register

The TRCITCTRL characteristics are:

## Purpose

A component can use TRCITCTRL to dynamically switch between functional mode and integration mode. In integration mode, topology detection is enabled. After switching to integration mode and performing integration tests or topology detection, reset the system to ensure correct behavior of CoreSight and other connected system components.

For additional information, see the CoreSight Architecture Specification.

## Configuration

This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCITCTRL are RES0.

## Attributes

TRCITCTRL is a 32-bit register.

## Field descriptions

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RES0 | IME

#### Bits [31:1]

Reserved, RES0.

#### IME, bit [0]
When topology detection or integration functionality is implemented:

Integration Mode Enable.

IME | Meaning
--- | ---
0b0 | Component functional mode.
0b1 | Component integration mode. Support for topology detection and integration testing is enabled.

####
Otherwise:

Reserved, RES0.

## Accessing TRCITCTRL

External debugger accesses to this register are IMPLEMENTATION DEFINED when the trace unit is not in the Idle state.

#### TRCITCTRL can be accessed through the external debug interface:

Component | Offset | Instance
--- | --- | ---
ETE | 0xF00 | TRCITCTRL

This interface is accessible as follows:

- When OSLockStatus(), or !AllowExternalTraceAccess() or !IsTraceCorePowered(), accesses to this register generate an error response.
- Otherwise, accesses to this register are RW.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

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