Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

## MRS

Move System Register to general-purpose register allows the PE to read an AArch64 System register into a general-purpose register.

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | o0 | op1 | CRn | CRm | op2 | Rt
| L |  |  |  |  |  |  |

####

MRS <Xt>, (<systemreg>|S<op0>_<op1>_<Cn>_<Cm>_<op2>)

AArch64.CheckSystemAccess('1':o0, op1, CRn, CRm, op2, Rt, L); integer t = UInt(Rt); integer sys_op0 = 2 + UInt(o0); integer sys_op1 = UInt(op1); integer sys_op2 = UInt(op2); integer sys_crn = UInt(CRn); integer sys_crm = UInt(CRm);

### Assembler Symbols

<Xt> | Is the 64-bit name of the general-purpose destination register, encoded in the "Rt" field.

<systemreg> | Is a System register name, encoded in the "o0:op1:CRn:CRm:op2". The System register names are defined in 'AArch64 System Registers' in the System Register XML.

<op0> | Is an unsigned immediate, encoded in o0:
o0 | <op0>
--- | ---
0 | 2
1 | 3

<op1> | Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field.

<Cn> | Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the "CRn" field.

<Cm> | Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field.

<op2> | Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field.

### Operation

AArch64.SysRegRead(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t);

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: isa v33.53, AdvSIMD v29.11, pseudocode v2022-09_rel, sve v2022-09_rel ; Build timestamp: 2022-09-30T16:37

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