Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

## BC.cond

Branch Consistent conditionally to a label at a PC-relative offset, with a hint that this branch will behave very consistently and is very unlikely to change direction.

### 19-bit signed PC-relative branch offset
(FEAT_HBC)

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | imm19 | 1 | cond
|  | o0 |

####

BC.<cond> <label>

if !IsFeatureImplemented(FEAT_HBC) then UNDEFINED; bits(64) offset = SignExtend(imm19:'00', 64); bits(4) condition = cond;

### Assembler Symbols

<cond> | Is one of the standard conditions, encoded in the standard way, and encoded in cond:
cond | <cond>
--- | ---
0000 | EQ
0001 | NE
0010 | CS
0011 | CC
0100 | MI
0101 | PL
0110 | VS
0111 | VC
1000 | HI
1001 | LS
1010 | GE
1011 | LT
1100 | GT
1101 | LE
1110 | AL
1111 | NV

<label> | Is the program label to be conditionally branched to. Its offset from the address of this instruction, in the range +/-1MB, is encoded as "imm19" times 4.

### Operation

boolean branch_conditional = TRUE; if ConditionHolds(condition) then BranchTo(PC64 + offset, BranchType_DIR, branch_conditional); else BranchNotTaken(BranchType_DIR, branch_conditional);

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: aarchmrs v2024-03_relA, pseudocode v2024-03_rel, sve v2024-03_rel ; Build timestamp: 2024-03-26T09:45

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