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# GICR_VSGIPENDR, Redistributor virtual SGI pending state register

The GICR_VSGIPENDR characteristics are:

## Purpose

Requests the pending state of virtual SGIs for a specified vPE.

## Configuration

This register is present only when GICv4.1 is implemented. Otherwise, direct accesses to GICR_VSGIPENDR are RES0.

A copy of this register is provided for each Redistributor.

## Attributes

GICR_VSGIPENDR is a 32-bit register.

## Field descriptions

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
Busy | RES0 | Pending

#### Busy, bit [31]

ID of target vPEID

Busy | Meaning
--- | ---
0b0 | Query of virtual SGI state not in progress.
0b1 | Query of virtual SGI state in progress.

#### Bits [30:16]

Reserved, RES0.

#### Pending, bits [15:0]

Pending state of virtual SGIs for requested vPEID.

This field is UNKNOWN when GICR_VSGIPENDR.Busy == 1

## Accessing GICR_VSGIPENDR

#### GICR_VSGIPENDR can be accessed through the memory-mapped interfaces:

Component | Frame | Offset | Instance
--- | --- | --- | ---
GIC Redistributor | VLPI_base | 0x0088 | GICR_VSGIPENDR

Accesses on this interface are RO.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

26/03/2024 09:49; 67c0ae5282a7629ba0ea0ba7267b43cd4f7939f6

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