Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

## CNTP (predicate as counter)

Set scalar to count from predicate-as-counter

Counts the number of true elements in the source predicate and places the scalar result in the destination general-purpose register.

### SVE2
(FEAT_SVE2p1)

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | vl | 1 | PNn | Rd

####

CNTP <Xd>, <PNn>.<T>, <vl>

if !HaveSME2() && !HaveSVE2p1() then UNDEFINED; constant integer esize = 8 << UInt(size); integer n = UInt(PNn); integer d = UInt(Rd); constant integer width = 2 << UInt(vl);

### Assembler Symbols

<Xd> | Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field.

<PNn> | Is the name of the first source scalable predicate register, with predicate-as-counter encoding, encoded in the "PNn" field.

<T> | Is the size specifier, encoded in size:
size | <T>
--- | ---
00 | B
01 | H
10 | S
11 | D

<vl> | Is the vl specifier, encoded in vl:
vl | <vl>
--- | ---
0 | VLx2
1 | VLx4

### Operation

if HaveSVE2p1() then CheckSVEEnabled(); else CheckStreamingSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; bits(PL) pred = P[n, PL]; bits(PL*4) mask = CounterToPredicate(pred<15:0>, PL*4); bits(64) sum = Zeros(64); constant integer limit = elements * width; for e = 0 to limit-1 if ActivePredicateElement(mask, e, esize) then sum = sum + 1; X[d, 64] = sum;

### Operational information

If PSTATE.DIT is 1:

- The execution time of this instruction is independent of:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.
- The response of this instruction to asynchronous exceptions does not vary based on:
  - The values of the data supplied in any of its registers.
  - The values of the NZCV flags.

Base Instructions | SIMD&FP Instructions | SVE Instructions | SME Instructions | Index by Encoding | Shared Pseudocode | Proprietary Notice

Internal version only: isa v33.74, AdvSIMD v29.23, pseudocode v2023-09_rel, sve v2023-09_rc3 ; Build timestamp: 2023-09-27T17:06

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